Spin Transfer Torque-Magnetoresistive Random Access Memories (SST-MRAM) that are memories utilizing a Magnetic Tunnel Junction (MTJ) element that is a resistance-change memory element are getting more attention. The STT-MRAM is a non-volatile memory that accomplishes a high-speed performance and a rewriting tolerance similar to those of a Dynamic Random Access Memory (DRAM), and for example, application of a differential pair structure, and introduction to a cache instead of a Static Random Access Memory (SRAM) have been studied.
However, STT-MRAMs generate leak currents, such as a sub threshold current (weak inversion current) of a Metal Oxide Semiconductor Field-Effect Transistor (MOSFET) for actuating the MJT element, and a current flowing through the MJT element.
One solution to such a leak current is to cut off power supply to a circuit while the circuit is not actuated (power gating).
As an example power gating, Non Patent Literature 1 indicates that a PL drier is provided for each of 32 differential pair STT-MRAM cells laid out along a word line, and the PL driver controls the power supply to the MTJ cell. That is, the 32 cells are taken as a group (grain) subjected to the control.